System Validation Engineer Intern (Vancouver)

Job description

<p> </p>
<div data-ogsc="black">
<h1 class="wnfdnti _1ibi0s33y _1ibi0s34u" data-pm-slice="1 1 []">System Validation Engineer Intern</h1>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea"><strong>Location:</strong> Vancouver, British Columbia, Canada (Onsite)<br><strong>Duration:</strong> 8 months<br><strong>Employment type:</strong> Internship / co-op</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">About the role</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">At Astera Labs, we design connectivity solutions that power cloud service providers, server manufacturers, and networking OEMs. We are seeking a System Validation Engineer Intern to validate hardware, firmware, and applications together as an integrated system.</p>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">You will collaborate closely with cross-functional engineering teams to investigate complex technical challenges, improve validation coverage, and accelerate product deployment. During this 8-month internship, you will own a scoped validation project with guidance from experienced engineers.</p>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">This is a high-impact, hands-on role at the intersection of software and hardware, where curiosity, creativity, and technical depth come together to help define the next generation of data-center connectivity networks.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">What you’ll do</h2>
<ul class="wnfdntf">
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Deliver repeatable test workflows and define test specifications for system-level validation.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Automate feature validation and conduct issue investigations using structured test procedures, logs, telemetry, and technical analysis.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Generate comprehensive validation reports and support lab setup activities.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Execute functional, performance, stress, reliability, interoperability, regression, and end-to-end validation scenarios.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Investigate issues across hardware, firmware, software, and applications by reproducing failures, analyzing logs and telemetry, and documenting clear findings.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Track bugs through their lifecycle, including reproduction steps, logs, traces, screenshots, retesting, regression testing, and closure verification.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Validate system functionality, subsystem integration, performance under load, stability, and recovery behavior.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Build dashboards, parse logs, analyze coverage and pass/fail trends, and identify opportunities to make validation more efficient.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Collaborate with cross-functional engineering teams to clarify requirements, investigate complex technical challenges, and improve validation processes.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Support interoperability and compliance activities by sharing validation reports, known-issues lists, test results, and follow-up findings.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Own a scoped validation project, provide progress updates, meet milestones, and present project results and recommendations at the end of the internship.</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Basic qualifications</h2>
<ul class="wnfdntf">
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Enrollment in a bachelor’s, master’s, or Ph.D. program in electrical engineering, computer engineering, computer science, or a related field.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Coursework, research, or project experience in systems, embedded software, digital hardware, computer architecture, networking, test engineering, or hardware/software integration.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Programming or scripting experience with Python, C, C++, Bash/Shell, or comparable languages.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Familiarity with Linux development environments, Git version control, command-line tools, issue-tracking platforms, data analysis, and technical documentation.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Ability to follow structured test procedures, troubleshoot from telemetry or logs, reproduce issues, and communicate findings clearly.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Strong ownership, curiosity, practical judgment, and willingness to collaborate across engineering functions.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Foundational understanding of computer architecture and platform components, including CPUs, GPUs, memory, storage, and PCIe devices.</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Preferred experience</h2>
<ul class="wnfdntf">
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience with system bring-up, hardware or firmware validation, lab testing, test automation, or device-under-test debugging.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Familiarity with industry protocols such as PCIe, CXL, Ethernet, I2C, and I3C.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Hands-on experience using laboratory equipment such as oscilloscopes, protocol analyzers, traffic generators, power supplies, or thermal-forcing systems.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Familiarity with firmware updates, boot flows, configuration and telemetry utilities, error injection, performance counters, or recovery testing.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience with interoperability, compliance, stress, reliability, or regression-testing frameworks.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience building dashboards, parsing logs, analyzing pass/fail trends, or automating validation reporting.</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Equal opportunity</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Astera Labs is an equal opportunity employer committed to fostering a diverse and inclusive workplace. We encourage anyone with relevant experience to apply.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Compensation and benefits</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Compensation and benefits for this Vancouver, Canada internship/co-op will be determined under applicable Canadian programs and specified in the offer letter.</p>
</div>
<p> </p>