Firmware Engineer Intern (SCO1)

Job description

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<h1 class="wnfdnti _1ibi0s33y _1ibi0s34u" data-pm-slice="1 1 []">Firmware Engineer Intern (SCO1)</h1>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea"><strong>Astera Labs • San Jose, CA (On-site) • Internship</strong></p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">About Astera Labs</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company's COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up and scale-out connectivity. Discover more at <a href="http://www.asteralabs.com" target="_blank">www.asteralabs.com</a>.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Role Overview</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Join the Firmware Engineering team behind <strong>Scorpio 1</strong>, Astera Labs' first-generation scale-up fabric switch that sits at the heart of AI data center racks. As a Firmware Engineer Intern (SCO1), you'll work alongside the Compute Connectivity Engineering team to build and debug the embedded firmware that brings this silicon to life — from register-level device configuration through customer-facing diagnostics. This is hands-on work: the firmware you touch controls real link training, calibration, and PCIe behavior on hardware that ships to hyperscale customers.</p>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Astera Labs interns don't just observe — they contribute to real projects that ship, working side-by-side with senior firmware engineers and getting exposure to the full path from bring-up to production support.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Key Responsibilities</h2>
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<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Write and debug embedded C/C++ firmware for the Scorpio 1 switch ASIC, including register configuration, state machines, and control-loop logic</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Support link training, SERDES configuration, and PCIe protocol-level debug alongside senior firmware engineers</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Contribute to calibration and diagnostics routines used during silicon bring-up and system validation</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Write Python scripts to automate test flows, parse hardware/debug logs, and analyze data from the lab</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Work with the system validation team to triage failures, reproduce issues, and help drive fixes into the firmware codebase</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Use lab tools (JTAG, trace logs, serial/debug consoles) to isolate and resolve firmware/hardware issues on real boards</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Keep work tracked in Jira, participate in code reviews, and communicate findings clearly to the team</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Basic Qualifications</h2>
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<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Currently pursuing a Bachelor's or Master's degree in Computer Science, Electrical/Electronics Engineering, Computer Engineering, or a related field</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Proficiency in C (preferred) or C++, including development of firmware</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Proficient in Python for scripting</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience with developer workflows, source control (preferably git), code reviews, and CI</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience developing firmware that executes on on-chip microcontrollers</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience debugging firmware/hardware issues using JTAG, trace logs, or other lab tools</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Professional attitude with the ability to formulate theories and well-thought-out questions to help debug and develop complex systems</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Preferred Qualifications</h2>
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<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Completed one or more courses in Real-Time Operating Systems (RTOS), or hands-on RTOS use during a prior internship/co-op or project</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Knowledge of testing tools such as PyTest or GoogleTest</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Familiarity with software build environments, CI/CD, and gcc/make</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience with lab hardware/firmware debug (oscilloscopes, protocol analyzers, logic analyzers)</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience developing firmware for PCIe, CXL, or Ethernet</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Prior internship or co-op experience in a semiconductor or networking hardware company</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Internship Experience and Compensation</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">This is a paid, hourly U.S. internship. The applicable hourly rate is determined as part of the offer process and specified in the offer letter, depending on education level, ranging from $35/hour to $55/hour. U.S. interns currently receive a $500-per-week housing/relocation stipend for the duration of the internship. Interns participate in Early Career programming, including technical and professional-development sessions, community events, and an end-of-program project presentation.</p>
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<h2>Equal opportunity</h2>
<p>Astera Labs is an equal opportunity employer committed to fostering a diverse and inclusive workplace. We encourage anyone with relevant experience to apply.</p>
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