Product Quality Engineer Intern

Job description

<p></p>
<h1 class="wnfdnti _1ibi0s33y _1ibi0s34u" data-pm-slice="1 1 []">Product Quality Engineer Intern</h1>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea"><strong>Location:</strong> San Jose, California<br><strong>Employment type:</strong> U.S. internship<br><strong>Work arrangement:</strong> Fully in-office</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">About the role</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">As a Product Quality Engineer Intern, you will help ensure that Astera Labs semiconductor and hardware products meet high standards for quality, reliability, performance, and customer experience. You will work alongside product quality, product engineering, field applications, hardware, validation, test, firmware/software, operations, and supplier teams across new product introduction, reliability qualification, customer returns, failure analysis, and continuous improvement.</p>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">This is a hands-on opportunity to apply your coursework to semiconductor quality and reliability. You will learn how engineering teams use lab measurements, production data, customer information, and structured quality processes to identify failure mechanisms, protect customers, and improve products. You will receive mentorship, contribute to meaningful work, and communicate your results to technical stakeholders.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">What you’ll do</h2>
<ul class="wnfdntf">
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Learn Astera Labs products, quality systems, reliability practices, lab procedures, and customer-return workflows.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Support reliability-qualification activities, including qualification-plan reviews, stress conditions, sample and lot planning, vendor coordination, hardware readiness, ATE screening, stress monitoring, and aging or drift analysis.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Help review schematics, layouts, test hardware, firmware/test-pattern readiness, and bench setup for qualification and product-quality investigations.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Assist with safe lab bring-up and measurements using equipment such as oscilloscopes, VNA, BERT/BER, power supplies, DMMs, and thermal equipment, as appropriate to the project.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Support customer-return and RMA investigations by reviewing returned units, customer system logs, Jira metadata, serialization, test history, lot history, and other evidence needed to maintain traceability.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Perform or assist with visual inspection, functional testing, commonality analysis, production-data checks, and chip-level system testing using compliance or evaluation boards.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Help investigate failure mechanisms through data analysis, power-cycle and temperature testing, TX/RX or signal-quality checks, and other non-destructive or destructive analysis performed with experienced engineers.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Collaborate with Product Quality, Product Engineering, Field Applications, Hardware, Firmware/Software, Validation, Test Engineering, Operations, suppliers, and contract manufacturers to isolate root causes and define corrective actions.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Contribute to 4D/8D reports, corrective-action evidence, failure-analysis records, qualification reports, customer-friendly documentation, and monthly failure or quality summaries.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Maintain clear updates in Jira, FA tracking systems, and related documentation so that evidence, decisions, communications, and next steps remain traceable.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Support process improvements such as RMA checklists, failure-isolation decision trees, instrument checklists, data-capture templates, or quality dashboards.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Prepare clear technical documentation and a final presentation that explain your approach, findings, impact, and learning.</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">What you bring</h2>
<ul class="wnfdntf">
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Current enrollment in a bachelor’s, master’s, or PhD program in electrical engineering, computer engineering, materials science, computer science, or a related technical field.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Strong technical fundamentals and evidence of applying them through coursework, laboratory work, research, internships, co-ops, senior design, hackathons, or personal projects.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Interest in semiconductor products, product quality, reliability, failure analysis, hardware/software systems, manufacturing, or engineering validation.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Ability to build, test, debug, analyze, and explain technical work—not simply list tools or technologies.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Familiarity with at least one programming or scripting language, such as Python, C/C++, or MATLAB, through coursework or projects.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Strong analytical and problem-solving skills, attention to detail, curiosity, and willingness to learn quickly.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Interest in working with measurements, statistics, production or test data, visualization, and reproducible engineering workflows.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Clear written and verbal communication and comfort collaborating across multiple engineering, operations, supplier, and customer-facing teams.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Commitment to safe, careful, and organized work in a laboratory environment.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Ability to work on-site in San Jose and contribute effectively within a team.</p>
</li>
</ul>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Preferred experience includes coursework, research, or projects involving semiconductor testing, reliability or qualification, ATE, failure analysis, PCIe, Ethernet, CXL, signal integrity, firmware qualification, computer architecture, data analysis, or hardware/software integration.</p>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">We value the quality, ownership, and impact of your work more than a particular school, course title, or tool list. If you meet many of the qualifications but not every item, we encourage you to apply.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Internship experience and compensation</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">This is a paid, hourly U.S. internship. The applicable hourly rate is determined as part of the offer process and specified in the offer letter, depending on education level ranges form $35/hour to $55/hour. U.S. interns currently receive a $500-per-week housing/relocation stipend for the duration of the internship. Interns participate in Early Career programming, including technical and professional-development sessions, community events, and an end-of-program project presentation.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Inclusive workplace</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.</p>
<p></p>