Product Applications Engineer Intern (Leo)

Job description

<p></p>
<h1 class="wnfdnti _1ibi0s33y _1ibi0s34u" data-pm-slice="1 1 []">Product Applications Engineer Intern (Leo)</h1>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea"><strong>Location:</strong> San Jose, California<br><strong>Employment type:</strong> Internship<br><strong>Work arrangement:</strong> On-site</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">About Astera Labs</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Astera Labs builds purpose-built connectivity solutions for rack-scale AI infrastructure. The Product Applications team helps translate those products into successful system deployments through technical collateral, product integration support, lab debug, validation, and cross-functional collaboration.</p>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Leo is Astera Labs’ CXL Smart Memory Controller product line. Leo solutions support memory expansion, pooling, and sharing for AI and cloud platforms, with capabilities including diagnostics, telemetry, and interoperability across processor and memory ecosystems.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">The opportunity</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">As a Product Applications Engineer Intern, you will work with experienced applications and engineering teams to help customers and internal partners understand, integrate, validate, and debug Leo products. You will gain hands-on experience at the intersection of high-speed connectivity, memory systems, embedded firmware/software, and customer-facing product engineering.</p>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">This is a practical engineering role for someone who enjoys moving between technical documentation, lab investigation, data and log analysis, and collaborative problem-solving. You will contribute to meaningful work that supports products used in next-generation AI infrastructure.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">What you’ll do</h2>
<ul class="wnfdntf">
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Support application-level investigation of Leo product questions and issues by reviewing system and device logs, reproducing problems in lab environments, documenting findings, and coordinating next steps with engineering teams.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Help create, update, and review product collateral such as product briefs, datasheets, application notes, integration guidance, debug documentation, and training materials.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Support software and firmware regression testing, including executing test flows, collecting results, identifying issues, and helping track follow-up actions.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Participate in interoperability testing with partner devices and platforms; help analyze results and prepare clear reports for internal and external use.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Build familiarity with CXL and PCIe-based systems, DDR memory, I2C/SMBus, embedded firmware, software development kits, diagnostics, and telemetry.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Collaborate with Product Applications, Field Applications, firmware/software, hardware, validation, product, and sales teams throughout the product lifecycle.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Contribute to internal product training and knowledge sharing by helping prepare materials, demonstrations, or technical walkthroughs.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Track work and issues clearly in team tools, communicate progress and blockers, and present project outcomes to technical and business stakeholders.</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">What you bring</h2>
<ul class="wnfdntf">
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Currently pursuing a bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Coursework, project, research, or hands-on experience involving computer architecture, high-speed interfaces, memory systems, embedded systems, hardware/software integration, or system validation.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Interest in learning how semiconductor connectivity products are integrated into real server and AI infrastructure systems.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Ability to approach technical problems methodically, use evidence from logs or measurements, and communicate findings clearly.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Strong written and verbal communication skills, attention to detail, and a collaborative working style.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Experience with any of the following is helpful: C/C++, Python or other scripting, Linux, CXL, PCIe, DDR/DRAM, I2C/SMBus, firmware/SDKs, Jira, or lab equipment.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Ability to work on-site in San Jose, California, for the internship.</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Internship experience and compensation</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">This is a paid, hourly U.S. internship. The applicable hourly rate is determined as part of the offer process and specified in the offer letter, depending on education level ranges form $35/hour to $55/hour. U.S. interns currently receive a $500-per-week housing/relocation stipend for the duration of the internship. Interns participate in Early Career programming, including technical and professional-development sessions, community events, and an end-of-program project presentation.</p>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Why join us</h2>
<ul class="wnfdntf">
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Work on real projects with visible product and business impact rather than shadowing a team.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Learn from engineers and leaders working on high-performance connectivity for AI and cloud infrastructure.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Gain exposure to product development from integration and validation through customer support and technical enablement.</p>
</li>
<li class="wnfdnte _1ibi0s33w">
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Build a technical network through Early Career programming, community events, mentorship, and project presentations.</p>
</li>
</ul>
<h2 class="wnfdnti _1ibi0s33y _1ibi0s34u">Equal opportunity and inclusion</h2>
<p class="wnfdntu _1ibi0s3f5 _1ibi0s3ce _1ibi0s3ea">Astera Labs is committed to providing equal employment opportunities to all employees and employment applicants without regard to unlawful considerations of race, religion, creed, color, national origin, sex, pregnancy, sexual orientation, gender identity, age, ancestry, physical or mental disability, genetic information, marital status, or any other classification protected by applicable local, state, or federal laws. We are committed to maintaining a workplace free from unlawful discrimination and harassment and to providing reasonable accommodations as required by law.</p>
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